Beating the nanotech bottleneck
European researchers are hoping to lower costs for the nanotech industry by developing design methodologies that focus on manufacturing, packaging and testing.
European researchers are hoping to lower costs for the nanotech industry by developing design methodologies that focus on manufacturing, packaging and testing.
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| Design of successful nano and micro-components needs to take into account good manufacture |
The PATENT-DfMM (design for micro and nano manufacture) network - part of EC framework 6 - was set up to find a way to cut the cost of packaging, testing and manufacturing micro and nano-devices. To do it, the 22-strong consortium has secured €6.2 million funding from the EU.
Patric Salomon, a partner with the PATENT-DfMM network of excellence, said: “For certain types of device, targeting very large volumes in sectors like the automotive and, more recently, the computer gaming industry, there is a promising future. But for many others, the lab is the only place where these devices are ever really used.
“Up to 80% of the unit cost for micro- and nano-devices is in the packaging and testing phase, and the unit cost must often come in under a euro. Many innovations are just too expensive to commercialise.”
The Network has so far looked at ways to simplify the design of micro manufacturing processes for 60 small-scale projects. This helps researchers learn about manufacturing constraints before starting a design, which they take into account during the concept phase, to optimise the manufacturing processes. This drives down costs and the time to market.
“In all, it offers hope of a commercial life for the thousands of lost innovations gathering dust in labs across the continent. More importantly, to make sure future inventions are “designed for manufacture” from their initial development phase,” said Salomon.
